Hacking ibis models for signal integrity

Circuit simulation is a critical component in the design of electronic circuits. One of the most popular uses for IBIS is as a tool to analyze the signal integrity of system boards.

Simulation models greatly facilitate detailed signal integrity analysis, as engineers can test the impact of design changes or determine whether a final design is ready to become an actual, physical prototype. A critical tool to knowing how a signal looks while propagating a trace, IBIS models enable a view into what might happen as the signal confronts changes in impedance, vias, stubs, terminations, and other signal path geometries that can alter intended signal characteristics. Signal integrity analysis investigates problems common to circuit design such as overshoot, undershoot, crosstalk, ringing, impedance mismatch, reflection, termination issues, analysis of different topologies, among other things.

IBIS models can model best- or worst-case scenarios and everything in between by employing maximum or minimum values. These standardized-format models play a part in circuit simulators e. Moreover, because IBIS is a simple model, the PCB level simulation is performed by look-up table calculation, so the calculation amount is small, and the calculation amount is 10 to 15 times less than the corresponding full Spice triode model simulation.

Can be used for system board level or multi-board signal integrity analysis simulation. Signal integrity issues that can be analyzed with the IBIS model include: crosstalk, reflection, oscillation, overshoot, undershoot, mismatched impedance, transmission line analysis, topology analysis. IBIS is especially capable of accurate and detailed simulation of high-speed oscillations and crosstalk.

It can be used to detect signal behavior under worst-case rise time conditions and some situations that cannot be solved by physical tests;. The model can be obtained free of charge from the semiconductor manufacturer, and the user does not need to pay extra for the model;.

Compatible with a wide range of simulation platforms in the industry, almost all signal integrity analysis tools accept IBIS models. Although IBIS files can be created manually or automatically converted by the Spice model, any conversion tool can't do anything if you can't get the minimum rise time parameter from the factory.

IBIS does not ideally handle circuits with rise-controlled drive types, especially those that involve complex feedback;. IBIS lacks the ability to model ground bounce noise. The IBIS model version 2. The new one will have a lot more terminators. That is the direct, incontrovertible evidence that signal integrity problems are growing more prevalent with every new product generation. Whenever I speak to a group of digital designers, I ask "How many of you have ever had to add terminators to a board during debug to get it to work?

It's an endemic problem, and an indication of the rather crude state of the art of signal integrity design at many companies. Terminations are one of the key tools available to help fix problems with ringing, yet many digital designers don't know how to tell when ringing will occur, what kind of termination will be required to fix the problem, and where it must be placed.

Too often have I seen a board laid out with termination mounting pads provided on every net, with the assumption that a debug technician will test every signal by hand, apply terminators as needed, and then update the net list.

Can't we do better than this? Isn't there some way to automate the process? The key parameters provided by an IBIS data file are ideally suited for automatic calculation of ringing and crosstalk. Keep in mind that IBIS, by itself, is nothing but a file format. That's up to the simulation tools that use IBIS models. IBIS is a fairly simple, straight-forward file format. It is well-suited for use by Spice-like but not Spice-compliant, because the file format is not directly readable by regular Spice circuit simulation tools.

It provides a behavioral description of a driver or receiver without revealing proprietary details of how the circuit is internally fabricated. In other words, vendors can use IBIS models to specify how their great new gate designs work without giving away too much information to their competitors. Also, because it is a simplified model, it is reported to require on the order of 10x to 15x less computation time than an equivalent full-Spice transistor-level model when doing simple at-load simulations.

It provides for specification of a complete V-I curve for a driver in it's HI state, another V-I curve to represent the driver in it's LO state, and a way to morph from one to the other at a defined transition rate. IBIS can be used to produce accurate, detailed simulations of high-speed ringing and crosstalk behavior.

It can be used to examine signal behavior under worst-case rise time conditions, something impossible to manage with physical testing. Lastly, because IBIS is a file format, not a procedural specification, we can use it for lots of stuff.